|
enum | { LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1
, FirstRVVBuiltin = clang::Builtin::FirstTSBuiltin
, LastRVVBuiltin = RISCVVector::FirstTSBuiltin - 1
, LastTSBuiltin
} |
|
enum class | VectorTypeModifier : uint8_t {
NoModifier
, Widening2XVector
, Widening4XVector
, Widening8XVector
,
MaskVector
, Log2EEW3
, Log2EEW4
, Log2EEW5
,
Log2EEW6
, FixedSEW8
, FixedSEW16
, FixedSEW32
,
FixedSEW64
, LFixedLog2LMULN3
, LFixedLog2LMULN2
, LFixedLog2LMULN1
,
LFixedLog2LMUL0
, LFixedLog2LMUL1
, LFixedLog2LMUL2
, LFixedLog2LMUL3
,
SFixedLog2LMULN3
, SFixedLog2LMULN2
, SFixedLog2LMULN1
, SFixedLog2LMUL0
,
SFixedLog2LMUL1
, SFixedLog2LMUL2
, SFixedLog2LMUL3
, SEFixedLog2LMULN3
,
SEFixedLog2LMULN2
, SEFixedLog2LMULN1
, SEFixedLog2LMUL0
, SEFixedLog2LMUL1
,
SEFixedLog2LMUL2
, SEFixedLog2LMUL3
, Tuple2
, Tuple3
,
Tuple4
, Tuple5
, Tuple6
, Tuple7
,
Tuple8
} |
|
enum class | BaseTypeModifier : uint8_t {
Invalid
, Scalar
, Vector
, Void
,
SizeT
, Ptrdiff
, UnsignedLong
, SignedLong
,
Float32
} |
|
enum class | TypeModifier : uint8_t {
NoModifier = 0
, Pointer = 1 << 0
, Const = 1 << 1
, Immediate = 1 << 2
,
UnsignedInteger = 1 << 3
, SignedInteger = 1 << 4
, Float = 1 << 5
, BFloat = 1 << 6
,
LMUL1 = 1 << 7
, MaxOffset = 7
, LLVM_MARK_AS_BITMASK_ENUM =(LMUL1)
} |
|
enum class | BasicType : uint8_t {
Unknown = 0
, Int8 = 1 << 0
, Int16 = 1 << 1
, Int32 = 1 << 2
,
Int64 = 1 << 3
, BFloat16 = 1 << 4
, Float16 = 1 << 5
, Float32 = 1 << 6
,
Float64 = 1 << 7
, MaxOffset = 7
, LLVM_MARK_AS_BITMASK_ENUM =(Float64)
} |
|
enum | ScalarTypeKind : uint8_t {
Void
, Size_t
, Ptrdiff_t
, UnsignedLong
,
SignedLong
, Boolean
, SignedInteger
, UnsignedInteger
,
Float
, BFloat
, Invalid
, Undefined
} |
|
enum | PolicyScheme : uint8_t { SchemeNone
, HasPassthruOperand
, HasPolicyOperand
} |
|
enum | RVVRequire : uint32_t {
RVV_REQ_None = 0
, RVV_REQ_RV64 = 1 << 0
, RVV_REQ_Zvfhmin = 1 << 1
, RVV_REQ_Xsfvcp = 1 << 2
,
RVV_REQ_Xsfvfnrclipxfqf = 1 << 3
, RVV_REQ_Xsfvfwmaccqqq = 1 << 4
, RVV_REQ_Xsfvqmaccdod = 1 << 5
, RVV_REQ_Xsfvqmaccqoq = 1 << 6
,
RVV_REQ_Zvbb = 1 << 7
, RVV_REQ_Zvbc = 1 << 8
, RVV_REQ_Zvkb = 1 << 9
, RVV_REQ_Zvkg = 1 << 10
,
RVV_REQ_Zvkned = 1 << 11
, RVV_REQ_Zvknha = 1 << 12
, RVV_REQ_Zvknhb = 1 << 13
, RVV_REQ_Zvksed = 1 << 14
,
RVV_REQ_Zvksh = 1 << 15
, RVV_REQ_Zvfbfwma = 1 << 16
, RVV_REQ_Zvfbfmin = 1 << 17
, RVV_REQ_Zvfh = 1 << 18
,
RVV_REQ_Experimental = 1 << 19
} |
|