clang 20.0.0git
riscv_crypto.h
Go to the documentation of this file.
1/*===---- riscv_crypto.h - RISC-V Zk* intrinsics ---------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __RISCV_CRYPTO_H
11#define __RISCV_CRYPTO_H
12
13#include <stdint.h>
14
15#if defined(__cplusplus)
16extern "C" {
17#endif
18
19#if defined(__riscv_zknd)
20#if __riscv_xlen == 32
21#define __riscv_aes32dsi(x, y, bs) __builtin_riscv_aes32dsi(x, y, bs)
22#define __riscv_aes32dsmi(x, y, bs) __builtin_riscv_aes32dsmi(x, y, bs)
23#endif
24
25#if __riscv_xlen == 64
26static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
27__riscv_aes64ds(uint64_t __x, uint64_t __y) {
28 return __builtin_riscv_aes64ds(__x, __y);
29}
30
31static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
32__riscv_aes64dsm(uint64_t __x, uint64_t __y) {
33 return __builtin_riscv_aes64dsm(__x, __y);
34}
35
36static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
37__riscv_aes64im(uint64_t __x) {
38 return __builtin_riscv_aes64im(__x);
39}
40#endif
41#endif // defined(__riscv_zknd)
42
43#if defined(__riscv_zkne)
44#if __riscv_xlen == 32
45#define __riscv_aes32esi(x, y, bs) __builtin_riscv_aes32esi(x, y, bs)
46#define __riscv_aes32esmi(x, y, bs) __builtin_riscv_aes32esmi(x, y, bs)
47#endif
48
49#if __riscv_xlen == 64
50static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
51__riscv_aes64es(uint64_t __x, uint64_t __y) {
52 return __builtin_riscv_aes64es(__x, __y);
53}
54
55static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
56__riscv_aes64esm(uint64_t __x, uint64_t __y) {
57 return __builtin_riscv_aes64esm(__x, __y);
58}
59#endif
60#endif // defined(__riscv_zkne)
61
62#if defined(__riscv_zknd) || defined(__riscv_zkne)
63#if __riscv_xlen == 64
64#define __riscv_aes64ks1i(x, rnum) __builtin_riscv_aes64ks1i(x, rnum)
65
66static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
67__riscv_aes64ks2(uint64_t __x, uint64_t __y) {
68 return __builtin_riscv_aes64ks2(__x, __y);
69}
70#endif
71#endif // defined(__riscv_zknd) || defined(__riscv_zkne)
72
73#if defined(__riscv_zknh)
74static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
75__riscv_sha256sig0(uint32_t __x) {
76 return __builtin_riscv_sha256sig0(__x);
77}
78
79static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
80__riscv_sha256sig1(uint32_t __x) {
81 return __builtin_riscv_sha256sig1(__x);
82}
83
84static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
85__riscv_sha256sum0(uint32_t __x) {
86 return __builtin_riscv_sha256sum0(__x);
87}
88
89static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
90__riscv_sha256sum1(uint32_t __x) {
91 return __builtin_riscv_sha256sum1(__x);
92}
93
94#if __riscv_xlen == 32
95static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
96__riscv_sha512sig0h(uint32_t __x, uint32_t __y) {
97 return __builtin_riscv_sha512sig0h(__x, __y);
98}
99
100static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
101__riscv_sha512sig0l(uint32_t __x, uint32_t __y) {
102 return __builtin_riscv_sha512sig0l(__x, __y);
103}
104
105static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
106__riscv_sha512sig1h(uint32_t __x, uint32_t __y) {
107 return __builtin_riscv_sha512sig1h(__x, __y);
108}
109
110static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
111__riscv_sha512sig1l(uint32_t __x, uint32_t __y) {
112 return __builtin_riscv_sha512sig1l(__x, __y);
113}
114
115static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
116__riscv_sha512sum0r(uint32_t __x, uint32_t __y) {
117 return __builtin_riscv_sha512sum0r(__x, __y);
118}
119
120static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
121__riscv_sha512sum1r(uint32_t __x, uint32_t __y) {
122 return __builtin_riscv_sha512sum1r(__x, __y);
123}
124#endif
125
126#if __riscv_xlen == 64
127static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
128__riscv_sha512sig0(uint64_t __x) {
129 return __builtin_riscv_sha512sig0(__x);
130}
131
132static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
133__riscv_sha512sig1(uint64_t __x) {
134 return __builtin_riscv_sha512sig1(__x);
135}
136
137static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
138__riscv_sha512sum0(uint64_t __x) {
139 return __builtin_riscv_sha512sum0(__x);
140}
141
142static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
143__riscv_sha512sum1(uint64_t __x) {
144 return __builtin_riscv_sha512sum1(__x);
145}
146#endif
147#endif // defined(__riscv_zknh)
148
149#if defined(__riscv_zksh)
150static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
151__riscv_sm3p0(uint32_t __x) {
152 return __builtin_riscv_sm3p0(__x);
153}
154
155static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
156__riscv_sm3p1(uint32_t __x) {
157 return __builtin_riscv_sm3p1(__x);
158}
159#endif // defined(__riscv_zksh)
160
161#if defined(__riscv_zksed)
162#define __riscv_sm4ed(x, y, bs) __builtin_riscv_sm4ed(x, y, bs);
163#define __riscv_sm4ks(x, y, bs) __builtin_riscv_sm4ks(x, y, bs);
164#endif // defined(__riscv_zksed)
165
166#if defined(__cplusplus)
167}
168#endif
169
170#endif
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ uint32_t uint32_t __y
Definition: arm_acle.h:130
unsigned long uint64_t
unsigned int uint32_t